Unit 71: Combinational and Sequential Logic
Assignment 1 – Combinational Logic Circuits
| Grading Criteria Assessed | |||||
| Pass | Achieved | Merit | Achieved | Distinction | Achieved |
| 1.1 | M1 | D1 | |||
| 1.2 | M2 | D2 | N/A | ||
| 1.3 | M3a | D3 | N/A | ||
| 1.4 | M3b | N/A | |||
| 2.1 | N/A | M3c | N/A | ||
| 2.2 | N/A | ||||
| 2.3 | N/A | ||||
| 2.4 | N/A | ||||
| 3.1 | N/A | ||||
| 3.2 | N/A | ||||
| 3.3 | N/A | ||||
| Assignment Author | IV Signature |
| Muhammed Al-Asadi | S Johnston |
PASS grade must be achieved:
| Outcomes | Learner has demonstrated the ability to: | Source of evidence |
|
Outcome 1
Be able to design and build circuits using combinational logic
|
LO1.1: Interpret manufacturer’s data sheet to select appropriate combinational logic devices for specific purposes
|
Task 1 |
|
LO1.2: Compare the characteristics of similar devices using different technologies
|
Task 2
|
|
|
LO1.3: Design, construct and test combinational circuits
|
Task 3 |
|
|
LO1.4: Use computer software packages to simulate logic circuits
|
Task 4 |
MERIT grade descriptors that may be achieved for this assignment:
| Merit Grade Descriptors | Indicative Characteristics | Source of evidence |
| M1
Identify and apply strategies to find appropriate solutions
|
|
Task 3 & References
|
| M2
Select/design and apply appropriate methods/techniques |
|
Task1
&
references
|
| M3a
Present and communicate appropriate findings
|
Throughout the report, the solutions are coherently presented using technical language appropriately and in a professional manner |
All Tasks |
DISTINCTION grade descriptors that may be achieved for this assignment:
| Merit Grade Descriptors | Indicative Characteristics | Source of evidence |
| D1
Use critical reflection to evaluate own work and justify valid conclusions
|
Discuss the advantages of using computer simulation for engineering design.
|
Task 4
|
General Information
All submissions to be electronic in MS Word format with a minimum of 20 typed words. All answers must be clearly identified as to which task and question they refer to. All work must be submitted through Learnzone.
Where a word count has been specified, the submission must be within ±10% of that value. Graphs, photographs and illustrations are not counted toward the word counting.
All answers must be supported with proper referencing of all articles, books, websites and materials being used in addition to a list of the datasheet used to meet the Merit and Distinction criteria given in this brief.
Task 1 – Learning Outcome 1.1
Interpret manufacturer’s data sheet to select appropriate combinational logic devices for specific purposes
Combinational logics such as AND, OR, NOT, NAND and NOR are used to design and build full adder and comparator logic circuits. Use manufacturer’s data sheets to select logic gates used in the design and building of:
- A two binary digits full adder
- A one bit magnitude comparator.
(300 words)
Task 2 – Learning Outcome 1.2
Compare the characteristics of similar devices using different technologies
Logic families include Diode-Transistor Logic (DTL) technology, Transistor-Transistor Logic (TTL) technology and Complementary Metal Oxide Semiconductor Logic (CMOS) technology. Using the datasheets included in task 1:
- List and define 4 of the characteristics and technical parameters of any two similar devices (AND, OR, NOT) manufactured by two manufacturers and state the technology used.
- Compare 3 of these characteristics and parameters of two similar devices manufactured by two different manufacturers.
- Support your answers with data obtained from the devices manufacturer’s datasheets.
(400 words)
Task 3 – Learning Outcome 1.3
Design, construct and test combinational circuits
Q1: Express the function of the following truth table as a sum of products. Simplify the function using Boolean algebra and implement it using combinational AND, OR and NOT gates.
| A | B | C | F |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |
Q2: Using combinational logic gates design and construct a two digits full adder. Write the expression of the functions of the full adder (Sum, Ci and Co). Illustrate these functions using the truth table.
Q3: Build and test in the lab the full adder circuit designed in Q2. Illustrate the results of your testing with photographs taken during the experiment.
(300 words)
Task 4 – Learning Outcome 1.4
Use computer software packages to simulate logic circuits
Using a computer software package, simulate the logic circuits designed and tested in task 3. Provide screenshots for all the possible inputs and outputs of the circuit simulated using the computer software. Validate results (measurements) obtained in task three using the computer simulation. Explain the method of simulation and comments on the simulation results.
(400 words)
End of assessment brief
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